OVS=X16
Control Register
| SYNC | USART Synchronous Mode  |  
| LOOPBK | Loopback Enable  |  
| CCEN | Collision Check Enable  |  
| MPM | Multi-Processor Mode  |  
| MPAB | Multi-Processor Address-Bit  |  
| OVS | Oversampling 0 (X16): Regular UART mode with 16X oversampling in asynchronous mode 1 (X8): Double speed with 8X oversampling in asynchronous mode 2 (X6): 6X oversampling in asynchronous mode 3 (X4): Quadruple speed with 4X oversampling in asynchronous mode  |  
| CLKPOL | Clock Polarity  |  
| CLKPHA | Clock Edge for Setup/Sample  |  
| MSBF | Most Significant Bit First  |  
| CSMA | Action on Slave-Select in Master Mode  |  
| TXBIL | TX Buffer Interrupt Level  |  
| RXINV | Receiver Input Invert  |  
| TXINV | Transmitter Output Invert  |  
| CSINV | Chip Select Invert  |  
| AUTOCS | Automatic Chip Select  |  
| AUTOTRI | Automatic TX Tristate  |  
| SCMODE | SmartCard Mode  |  
| SCRETRANS | SmartCard Retransmit  |  
| SKIPPERRF | Skip Parity Error Frames  |  
| BIT8DV | Bit 8 Default Value  |  
| ERRSDMA | Halt DMA on Error  |  
| ERRSRX | Disable RX on Error  |  
| ERRSTX | Disable TX on Error  |  
| SSSEARLY | Synchronous Slave Setup Early  |  
| BYTESWAP | Byteswap in Double Accesses  |  
| AUTOTX | Always Transmit When RX Not Full  |  
| MVDIS | Majority Vote Disable  |  
| SMSDELAY | Synchronous Master Sample Delay  |